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    【Intel 上海實習】Electronic Package Engineering Internship Locat
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    樓主 發表于  2021/3/1 16:33:35    編 輯   

    【Intel 上海實習】Electronic Package Engineering Internship

    Location: Shanghai
    Contact: bin.liu@intel.com

    Job Description
    ?The Non-Volatile Memory group in Shanghai PRC is looking for a full-time paid intern to help support Package path finding development team projects, including Silicon / package interaction assembly process solutions, DOEs executions and coordination with Fab, Intel assembly subcontractors to fulfill assembly process development project objectives, ensure project schedules and on-time qualification to achieve new product and package transfer to high volume manufacturing. Additional project responsibilities will be added once project begins.

    Qualifications
    Minimum Qualifications:
    The candidate must be pursuing a BS degree in Materials Science, Metallurgical Engineering, Ceramic Engineering, Chemical Engineering, Mechanical Engineering or related field.
    The candidate must have the unrestricted right to work in the U.S. without requiring sponsorship.

    Preferred Qualifications:
    experience/knowledge in electronic materials processing.
    experience/knowledge experience in IC fabrication process.
    experience/knowledge in electronic packaging materials and/or assembly process.
    experience/knowledge in material sample polish and grind.
    experience/knowledge in fast paced environment.

    Pls send your resume to bin.liu@intel.com

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